李清安

武汉大学计算机学院 软件工程系 人工智能研究所 副教授 (硕导)

研究方向

研究领域包括编译优化、嵌入式系统和软件分析等。先后发表30余篇论文在TC、TPDS、TVLSI、TCAD、TODEAS等IEEE/ACM Transactions国际权威期刊和DATE、LCTES、DAC、ISLPED、ASP-DAC、CASES、TrustCom等重要国际会议上。主持和参与多项国家和省部级科研项目。

教育背景

2014年2月毕业于香港城市大学（与武汉大学联合培养），获博士学位。 2013年12月毕业于武汉大学计算机软件与理论专业，获博士学位。 2008年6月毕业于武汉大学计算机学院，获学士学位。

工作经验

教授课程

发表论文

Journal:
1. Write Mode Aware Loop Tiling for High Performance Low Power Volatile PCM in Embedded Systems, Keni Qiu, Qingan Li, Jingtong Hu, Weigong Zhang, Chun Jason Xue, accepted in IEEE Transactions on Computers (TC) (2015) (CCF A) Accepted.
2. Qingan Li, Yanxiang He, Jianhua Li, Liang Shi, Yiran Chen, Chun Jason Xue: Compiler-Assisted Refresh Minimization for Volatile STT-RAM Cache. IEEE Trans. Computers 64(8): 2169-2181 (2015) (CCF A)
3. Qingan Li, Jianhua Li, Liang Shi, Mengying Zhao, Chun Jason Xue, Yanxiang He: Compiler-Assisted STT-RAM-Based Hybrid Cache for Energy Efficient Embedded Systems. IEEE Trans. VLSI Syst. 22(8): 1829-1840 (2014) (CCF B)
4. Jianhua Li, Liang Shi, Qingan Li, Chun Jason Xue, Yinlong Xu: Thread Progress Aware Coherence Adaption for Hybrid Cache Coherence Protocols. IEEE Trans. Parallel Distrib. Syst. 25(10): 2697-2707 (2014) (CCF A)
5. Keni Qiu, Mengying Zhao, Qingan Li, Chenchen Fu, Chun Jason Xue: Migration-Aware Loop Retiming for STT-RAM-Based Hybrid Cache in Embedded Systems. IEEE Trans. on CAD of Integrated Circuits and Systems 33(3): 329-342 (2014) (CCF B)
6. Yazhi Huang, Liang Shi, Jianhua Li, Qingan Li, Chun Jason Xue: WCET-Aware Re-Scheduling Register Allocation for Real-Time Embedded Systems With Clustered VLIW Architecture. IEEE Trans. VLSI Syst. 22(1): 168-180 (2014) (CCF B)
7. Liang Shi, Jianhua Li, Qingan Li. Xue, C.J, Chengmo Yang, Xuehai Zhou, "A Unified Write Buffer Cache Management Scheme for Flash Memory," Very Large Scale Integration (VLSI) Systems, IEEE Transactions on , vol.22, no.12, pp.2779,2792, Dec. 2014 (CCF B)
8. Jianhua Li, Liang Shi, Qingan Li, Chun Jason Xue, Yiran Chen, Yinlong Xu, Wei Wang: Low-energy volatile STT-RAM cache design using cache-coherence-enabled adaptive refresh. ACM Trans. Design Autom. Electr. Syst. 19(1): 5 (2013) (CCF B)
9. Wanyong Tian, Yingchao Zhao, Liang Shi, Qingan Li, Jianhua Li, Chun Jason Xue, Minming Li, Enhong Chen: Task Allocation on Nonvolatile-Memory-Based Hybrid Main Memory. IEEE Trans. VLSI Syst. 21(7): 1271-1284 (2013) (CCF B)

Conference:
1. Qing''''an Li, Mengying Zhao, Jingtong Hu, Yongpan Liu, Yanxiang He, Chun Jason Xue:Compiler directed automatic stack trimming for efficient non-volatile processors. DAC 2015: 183:1-183:6. (CCF B)
2. Mengying Zhao, Qingan Li, Mimi Xie, Yongpan Liu, Jingtong Hu and Jason Xue. Software assisted non-volatile register reduction for energy harvesting based cyber-physical system. DATE 2015: 567-572. (CCF B)
3. Qingan Li, Yanxiang He, Yong Chen, Chun Jason Xue, Nan Jiang, Chao Xu: A wear-leveling-aware dynamic stack for PCM memory in embedded systems. DATE 2014: 1-4 (CCF B)
4. Keni Qiu, Qingan Li, Chun Jason Xue: Write Mode Aware Loop Tiling for High Performance Low Power Volatile PCM. DAC 2014: 1-6. (CCF B)
5. Yiqun Wang, Hongyang Jia, Yongpan Liu, Qingan Li, Chun Jason Xue, Huazhong Yang: Register allocation for hybrid register architecture in nonvolatile processors. ISCAS 2014: 1050-1053 (CCF C)
6. Qingan Li, Lei Jiang, Youtao Zhang, Yanxiang He, Chun Jason Xue: Compiler directed write-mode selection for high performance low power volatile PCM. LCTES 2013: 101-110 (CCF B)
7. Qingan Li, Jianhua Li, Liang Shi, Chun Jason Xue, Yiran Chen, Yanxiang He: Compiler-assisted refresh minimization for volatile STT-RAM cache. ASP-DAC 2013: 273-278 (CCF C)
8. Jianhua Li, Liang Shi, Qingan Li, Chun Jason Xue, Yiran Chen, Yinlong Xu: Cache coherence enabled adaptive refresh for volatile STT-RAM. DATE 2013: 1247-1250 (CCF B)
9. Mengting Yuan, Chun Jason Xue, Chen Yong, Qingan Li, Yingchao Zhao: Minimizing code size via page selection optimization on partitioned memory architectures. CASES 2013: 1-10 (CCF C)
10. Qingan Li, Mengying Zhao, Chun Jason Xue, Yanxiang He: Compiler-assisted preferred caching for embedded systems with STT-RAM based hybrid cache. LCTES 2012: 109-118 (CCF B)
11. Qingan Li, Jianhua Li, Liang Shi, Chun Jason Xue, Yanxiang He: MAC: migration-aware compilation for STT-RAM based hybrid cache in embedded systems. ISLPED 2012: 351-356 (CCF C)

科研课题

在研的科研项目：
1.国家自然科学基金青年科学基金项目，基于编译的PCM内存损耗均衡方法研究， No. 61502346，2016.01-2018.12
2.湖北省自然科学基金青年科学基金项目，面向嵌入式片上存储的低功耗编译优化方法，No. 2015CFB338，2015.01-2016.12

在研的企业项目：
1. 嵌入式优化编译器开发。
2. 基于统计的软件缺陷预测。

研究团队

本课题组招收硕士研究生，将会为学生良好的学习环境和悉心的指导，欢迎有意从事嵌入式系统、编译优化等领域研究的同学与我联系。同时欢迎和鼓励优秀本科生加入到课题组中参与学习和研究。

知识产权

2014 ACM Wuhan Doctoral Dissertation Award. 2014 香港城市大学Peter Ho Conference Scholarship. 2013 ASP-DAC conference Best Paper Nominee. 2012 ISLPED conference Best Paper Nominee. 2012 博士研究生国家奖学金. 2005 本科生国家奖学金.

学术服务

LCTES 2015 publicity co-chair。IEEE Trans. on CAD, IEEE Transactions on VLSI Systems, ACM Transactions on Embedded Computing Systems, Journal of Systems Architecture, IET Computers & Digital Techniques等SCI期刊审稿人，《计算机学报》，《计算机研究与发展》审稿人。

成果展示

其他